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 74LVQ245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs
May 1998
74LVQ245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs
General Description
The LVQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.
Features
n Ideal for low power/low noise 3.3V applications n Implements patented EMI reduction circuitry n Available in SOIC JEDEC, SOIC EIAJ and QSOP packages n Guaranteed simultaneous switching noise level and dynamic threshold performance n Improved latch-up immunity n Guaranteed incident wave switching into 75 n 4 kV minimum ESD immunity
Ordering Code
Order Number 74LVQ245SC 74LVQ245SJ 74LVQ245QSC Package Number M20B M20D MQA20 Package Description 20-Lead (0.300" Wide) Small Outline Package, SOIC JEDEC 20-Lead Molded Shrink Small Outline Package, SOIC EIAJ 20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP JEDEC
Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
Pin Assignment for SOIC and QSOP
DS011357-1
IEEE/IEC
DS011357-3
DS011357-2
(c) 1998 Fairchild Semiconductor Corporation
DS011357
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Pin Descriptions
Pin Names OE T/R A0-A7 B0-B7 Description Output Enable Inputs Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs
Truth Table
Inputs OE L L H
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
Outputs T/R L H X Bus B Data to Bus A Bus A Data to Bus B HIGH-Z State
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Absolute Maximum Ratings (Note 1)
Supply Voltage (VCC) DC Input Diode Current (IIK) VI = -0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = -0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) DC Latch-Up Source or Sink Current -0.5V to +7.0V -20 mA +20 mA -0.5V to VCC + 0.5V -20 mA +20 mA -0.5V to VCC + 0.5V
Recommended Operating Conditions (Note 2)
Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (V/t) VIN from 0.8V to 2.0V VCC @ 3.0V 2.0V to 3.6V 0V to VCC 0V to VCC -40C to +85C
125 mV/ ns
50 mA 400 mA -65C to +150C 300 mA
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol Parameter VCC (V) 3.0 3.0 3.0 3.0 3.0 3.0 3.6 3.6 3.6 3.6 3.6 4.0 0.002 TA = +25C Typ VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 1.5 1.5 2.99 2.0 0.8 2.9 2.58 0.1 0.36 TA = -40C to +85C Guaranteed Limits 2.0 0.8 2.9 2.48 0.1 0.44 V V V V V V A mA mA A A VOUT = 0.1V or VCC - 0.1V VOUT = 0.1V or VCC - 0.1V IOUT = -50 A VIN = VIL or VIH (Note 3) IOH = -12 mA VOL Maximum Low Level Output Voltage IOUT = 50 A VIN = VIL or VIH (Note 3) IOL = +12 mA IIN IOLD IOHD ICC IOZT Maximum Input Leakage Current Minimum Dynamic Output Current (Note 4) Maximum Quiescent Supply Current Maximum I/O Leakage Current VI = VCC, GND VOLD = 0.8V Max (Note 5) VOHD = 2.0V Min (Note 5) VIN = VCC or GND VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND VOLP VOLV VIHD VILD Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Maximum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage 3.3 3.3 3.3 3.3 0.5 -0.5 1.6 1.7 0.8 -0.8 2.0 0.8 V V V V (Notes 6, 7) (Notes 6, 7) (Notes 6, 8) (Notes 6, 8) Units Conditions
0.1
1.0
36 -25 40.0
0.3
3.0
Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: Incident wave switching on transmission lines with impedances as low as 75 for commercial temperature range is guaranteed for 74LVQ. Note 6: Worst case package. Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND. Note 8: Max number of Data Inputs (n) switching. (n - 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz.
3
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AC Electrical Characteristics
TA = +25C CL = 50 pF Min tPHL tPLH tPZL tPZH tPHZ tPLZ tOSHL tOSLH Output to Output Skew (Note 9) Output Disable Time Output Enable Time Propagation Delay 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.0 2.0 3.0 3.0 1.0 1.0 Typ 9.0 7.5 10.2 8.5 10.2 8.5 1.0 1.0 Max 14.0 10.0 18.3 13.0 20.4 14.5 1.5 1.5 TA = -40C to +85C CL = 50 pF Min 2.0 2.0 3.0 3.0 1.0 1.0 Max 15.0 10.5 19.0 13.5 21.0 15.0 1.5 1.5 ns ns ns ns
Symbol
Parameter
VCC (V)
Units
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameterguaranteed by design.
Capacitance
Symbol CIN CI/O CPD (Note 10) Parameter Input Capacitance Input/Output Capacitance Power Dissipation Capacitance Typ 4.5 15 67 Units pF pF pF Conditions VCC = Open VCC = 3.3V VCC = 3.3V
Note 10: CPD is measured at 10 MHz.
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Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead (0.300" Wide) Small Outline Package, SOIC JEDEC Package Number M20B
20-Lead Molded Shrink Small Outline Package, SOIC EIAJ Package Number M20D
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74LVQ245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP JEDEC (also known as QSOP) Package Number MQA20
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and (c) whose device or system, or to affect its safety or effectiveness. failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.
Fairchild Semiconductor Corporation Americas Customer Response Center Tel: 1-888-522-5372 Fax: 972-910-8036 Fairchild Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 8 141-35-0 English Tel: +44 (0) 1 793-85-68-56 Italy Tel: +39 (0) 2 57 5631 Fairchild Semiconductor Hong Kong Ltd. 8/F Room 808 Empire Centre 68 Mody Road, Tsimshatsui East Kowloon, Hong Kong Tel: 852-2722-8338 Fax: 852-2722-8383 Fairchild Semiconductor Japan Ltd. 4F, Natsume BI, 2-18-6 Yushima, Bunkyo-ku, Tokyo 113-0034, Japan Tel: 81-3-3818-8840 Fax: 81-3-3818-8450
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.


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